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Perturbation and Pitch Normalization as Enhancements to Speaker Recognition
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In: DTIC (2009)
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| 2 |
Automating Convoy Training Assessment to Improve Soldier Performance
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In: DTIC (2008)
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| 3 |
Cross-Cultural Nonverbal Cue Immersive Training
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In: DTIC (2008)
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| 5 |
The 2005 AFRL/HEC One-Speaker Detection Systems
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In: DTIC (2006)
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| 6 |
Enhancing Mental Readiness in Military Personnel
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In: DTIC (2006)
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| 7 |
Towards a Formal Ontology for Military Coalitions Operations
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In: DTIC (2005)
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| 8 |
Comment ameliorer la selection et le traitement des messages verbaux? (How to Improve the Selection and Processing of Verbal Messages)
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In: DTIC (2005)
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| 9 |
Evaluation of Speech Synthesis Systems using the Speech Reception Threshold Methodology
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In: DTIC (2005)
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| 10 |
Initial Kernel Timing Using a Simple PIM Performance Model
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In: DTIC AND NTIS (2005)
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Abstract:
This presentation will describe some initial results of paper-and-pencil studies of 4 or 5 application kernels applied to a processor-in-memory (PIM) system roughly similar to the Cascade Lightweight Processor (LWP). The application kernels are: * Linked list traversal * Sun of leaf nodes on a tree * Bitonic sort * Vector sum * Gaussian elimination The intent of this work is to guide and validate work on the Cascade project in the areas of compilers, simulators, and languages. We will first discuss the generic PIM structure. Then, we will explain the concepts needed to program a parallel PIM system (locality, threads, parcels). Next, we will present a simple PIM performance model that will be used in the remainder of the presentation. For each kernel, we will then present a set of codes, including codes for a single PIM node, and codes for multiple PIM nodes that move data to threads and move threads to data. These codes are written at a fairly low level, between assembly and C, but much closer to C than to assembly. For each code, we will present some hand-drafted timing forecasts, based on the simple PIM performance model. Finally, we will conclude by discussing what we have learned from this work, including what programming styles seem to work best, from the point-of-view of both expressiveness and performance. ; See also ADM001742. Presented at the Annual High Performance Embedded Computing (HPEC) Workshops (8th) held in Lexington, MA on 28-30 Sep 2004. HPEC-7-VOL-1-REV. Prepared in cooperation with Notre Dame University and Cray, Inc. The original document contains color images. Briefing charts only.
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Keyword:
*MATHEMATICAL MODELS; *PROCESSING EQUIPMENT; BRIEFING CHARTS; COMPILERS; COMPONENT REPORTS; Computer Hardware; LIGHTWEIGHT; LOW LEVEL; NODES; Operations Research; PIM(PROCESSOR-IN-MEMORY); SIMULATORS; SYMPOSIA
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URL: http://www.dtic.mil/docs/citations/ADA433091
http://oai.dtic.mil/oai/oai?&verb=getRecord&metadataPrefix=html&identifier=ADA433091
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| 11 |
Speech Intelligibility with a Bone Vibrator
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In: DTIC (2005)
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| 12 |
Speech Intelligibility with Acoustic and Contact Microphones
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In: DTIC (2005)
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| 13 |
Objective Measurement of the Speech Transmission Quality of Vocoders by Means of the Speech Transmission Index
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In: DTIC (2005)
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| 14 |
Analysis of Free-Form Battlefield Reports with Shallow Parsing Techniques
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In: DTIC AND NTIS (2004)
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| 15 |
Representational and Inferential Requirements for Diagrammatic Reasoning in the Entity Re-Identification Task
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In: DTIC AND NTIS (2004)
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| 16 |
The Case for Using Semantic Nets as a Convergence Format for Symbolic Information Fusion
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In: DTIC AND NTIS (2004)
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| 17 |
Electronic Information Management and Intellectual Property Rights
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In: DTIC AND NTIS (2004)
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| 18 |
Ontological Approach to Military Knowledge Modeling and Management
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In: DTIC AND NTIS (2004)
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| 19 |
Story Link Detection and New Event Detection are Asymmetric
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In: DTIC (2003)
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